Cisco ASR 9006 Manuel d'utilisateur Page 57

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Presentation_ID
58
ASR 9000 MAC Learning Overview
NP0
PHY
NP2
PHY
NP3
PHY
NP1
PHY
FIA
CPU
NP0PHY
NP2PHY
NP3PHY
NP1PHY
FIA
CPU
Switch
Fabric
MAC learning/aging/flushing is done by hardware
and fully distributed on each NP independently
Distributed HW based MAC Learning
MAC learning /aging/flushing is fully distributed to the NP, independently
Each NP can learn around 4-5 Millions MAC addresses per second in
hardware
Data-plane MAC table synchronization
MAC address are synchronized across all NPs in the entire system, regardless
of the bridge-domain or bridge port configuration.
MAC address synchronization is achieved by special MAC notification
messages which is implemented in the data-plane microcode
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